Conjuring Hardware Failures for Cross-ring Privilege Escalation
Christopher Domas
DEF CON 33 · Day 2 · Main Stage
Machine Check Exceptions (MCEs) are among the most catastrophic events an x86 processor can experience: they signal that hardware — the CPU itself, memory controllers, cache hierarchy, or system buses
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Synthetic MCE triggering for cross-ring privilege escalation without a traditional software vulnerability — exploiting the architectural design tension between the machine check mechanism and OS security assumptions about when hardware fails.