Panel: When Hardware Gets Pwned: Mechanics of Detection, Response & Recovery
Aaron Guzman, James DeLuccia (Product Security Chief, BA & AI Cyber Center of Excellence Leader · Honeywell), Marcus Richerson (Somerset Recon)
Hardwear.io Security Trainings and Conference USA 2026 · Day 2 · Main Stage
Overview
The cybersecurity industry has become exceptionally adept at demonstrating that hardware can be compromised. From sophisticated supply chain attacks to intricate side-channel vulnerabilities, the capability to pwn hardware is no longer a mystery. However, a significant gap persists: the operational reality that follows such a compromise. This panel discussion at Hardwear.io USA directly confronts this challenge, moving beyond the "how to compromise" to the far more complex "what happens next?" It delves into the mechanics of detection, attribution, remediation, and recovery, especially when dealing with hardware deployed at scale.

Key moments
- 0:00 Introduction: The Unsolved Problem of Hardware Recovery
- 6:20 Unexpected impact: Physical harm from chaining bugs
- 9:00 The lack of EDR/XDR equivalent for hardware security
- 15:50 Importance of proof-of-concept for hardware vulnerability researchers
- 24:00 Hardware vs. software fixes: Cost, scope, and manufacturing
- 28:50 The difficult reality of hardware remediation in the field
- 37:00 Is hardware detection unsolvable or merely underinvested?
Panel: When Hardware Gets Pwned: Mechanics of Detection, Response & Recovery
Speakers: Aaron Guzman; James DeLuccia (Product Security Chief, BA & AI Cyber Center of Excellence Leader, Honeywell); Marcus Richerson (Somerset Recon)
Conference: Hardwear.io USA
YouTube: https://www.youtube.com/watch?v=Ys8Sj2N8PtY
Overview
The cybersecurity industry has become exceptionally adept at demonstrating that hardware can be compromised. From sophisticated supply chain attacks to intricate side-channel vulnerabilities, the capability to pwn hardware is no longer a mystery. However, a significant gap persists: the operational reality that follows such a compromise. This panel discussion at Hardwear.io USA directly confronts this challenge, moving beyond the "how to compromise" to the far more complex "what happens next?" It delves into the mechanics of detection, attribution, remediation, and recovery, especially when dealing with hardware deployed at scale.
Moderated by Aaron Guzman, the panel brings together three distinct perspectives: James DeLuccia, representing the builder and product security team; Marcus Richerson, an assessor and security researcher; and Guzman himself, providing insights from a broader industry and research standpoint. The discussion anchors on a single, compelling scenario: an enterprise managed switch, deployed across 200+ branch offices, harboring a firmware-level implant introduced in the supply chain. This implant is designed to survive OS reloads and factory resets, leaving the organization completely unaware of its presence. The panel meticulously dissects this scenario, offering candid insights into where current processes and technologies fail across the lifecycle of a hardware compromise.
The core premise of the talk is that while the ability to demonstrate hardware vulnerabilities is strong, the frameworks, tools, and processes for hardware incident response are severely lacking compared to their software counterparts. The panel explores the stark realities faced by product security teams, external assessors, and builders when confronted with a stealthy, persistent hardware threat. It highlights the critical need for a paradigm shift in how organizations approach hardware security beyond initial vulnerability discovery, emphasizing the journey from compromise discovery to full recovery and the restoration of trust.
Background
▶ Watch: Introduction: The Unsolved Problem of Hardware Recovery (0:00)
The landscape of hardware security is characterized by a significant disparity when compared to software security. As the panel notes, while software benefits from mature Endpoint Detection and Response (EDR), Security Information and Event Management (SIEM), and Extended Detection and Response (XDR) solutions, no widely adopted or equivalent frameworks exist for hardware. This vacuum creates a critical blind spot, especially for firmware-level persistence attacks that can bypass traditional security controls. The problem is exacerbated by the long-term, patient nature of nation-state level attacks, where implants can lie dormant in the supply chain for years before activation.
James DeLuccia, from the builder's perspective, emphasizes the role of governance and supply chain due diligence. Modern customers, particularly in regulated industries, are increasingly sophisticated in their hardware assessments. This has led to stricter adherence to government restrictions on specific chip suppliers and a proactive approach to building resilient product architectures. For instance, manufacturers are designing products with the ability to swap out CPUs or other critical components, a trend accelerated since 2020. This architectural flexibility aims to mitigate risks associated with untrusted or compromised supply chain elements, ensuring that a single component failure doesn't halt global product deployment. The goal is to design products that can be easily adapted to comply with evolving intelligence and restrictions, making them robust for diverse regional requirements.
Marcus Richerson, representing the assessor, sheds light on what surprises organizations most during hardware audits. It's not typically the category of bug—like a buffer overflow or chip glitching—but rather the chaining of vulnerabilities to cause significant, real-world impact. In sectors like Operational Technology (OT) and medical devices, the potential for physical harm or loss of life due to chained bugs fundamentally shifts the perception of risk. This realization often serves as a crucial motivator for organizations to invest more seriously in hardware security. Richerson also stresses the importance of educating hardware builders early in the development cycle about advanced attack techniques such as decapping or glitching, and the critical role of choosing the right chip to mitigate risks from the outset. Without this foundational understanding, even robust testing methodologies can only react to problems rather than prevent them.
Key Findings
▶ Watch: The lack of EDR/XDR equivalent for hardware security (9:00)
The panel's discussion crystallized several critical findings regarding the current state of hardware security:
- Pervasive Detection Gap: The most striking takeaway is the profound lack of effective hardware-level detection capabilities. Marcus Richerson explicitly states that "the first thing that breaks is detection," particularly for stealthy, persistent implants. Unlike software, there's no widespread equivalent to EDR for hardware, leaving organizations operationally incapable of reliably detecting firmware-level persistence in deployed infrastructure.
- Supply Chain as a Primary Vector: The scenario of a firmware implant introduced in the supply chain, surviving OS reloads and factory resets, underscores the persistent and difficult-to-detect nature of such attacks. These implants can lay dormant for years, highlighting the need for continuous vigilance and robust supply chain security measures.
- Remediation is Brutal and Costly: When a hardware compromise is confirmed, remediation is often physically intensive and expensive. As James DeLuccia humorously (but truthfully) puts it, "we just roll trucks." This means physically replacing devices in the field, a monumental task for hundreds or thousands of deployed units. Aaron Guzman aptly summarizes this reality: "Hardware is forever," emphasizing the long-term, costly implications of compromised physical components.
- Trust Erosion and Management: Maintaining customer trust is paramount. The panel stresses the importance of owning security incidents, transparently communicating with customers, and providing timely fixes. A culture of continuous learning and improvement, where every finding updates internal processes and defenses, is essential to prevent repeated issues and rebuild trust.
- Underinvestment vs. Structural Problem: The debate on whether hardware detection is fundamentally unsolvable or simply underinvested leans heavily towards underinvestment. While there are structural challenges (e.g., von Neumann architecture), the consensus is that increased investment in advanced detection techniques, such as monitoring physical anomalies (vibrations, acoustics, power draw) and enhancing system integrity checks across components, can make future detection possible. The cost of such analysis, however, remains a significant barrier for many organizations.
- Importance of Collaboration and Proofs: Both product security teams and external assessors benefit immensely from clear, actionable Proof of Concepts (POCs) from researchers. These POCs are crucial for validating findings, understanding impact, and enabling efficient triage and remediation efforts. Manufacturers are increasingly open to engaging with external researchers through bug bounties and strategic partnerships.
Technical Deep Dive
▶ Watch: Importance of proof-of-concept for hardware vulnerability researchers (15:50)
The central technical scenario driving the panel's discussion is a firmware-level implant embedded within an enterprise managed switch. This implant, introduced during the supply chain, possesses several key characteristics that make it exceptionally challenging: it survives operating system reloads and even factory resets, rendering standard remediation techniques ineffective. This persistence implies the implant resides in non-volatile memory that is not wiped by typical reset procedures, potentially in the bootloader, a dedicated microcontroller, or other deeply embedded components.
From the perspective of an assessor like Marcus Richerson, approaching such a device involves a full stack testing methodology. This begins with identifying potential low-level access points. Common initial vectors for hardware assessment, mentioned by Aaron Guzman, include UART (Universal Asynchronous Receiver/Transmitter) and JTAG (Joint Test Action Group) interfaces. These serial communication and debugging ports can provide direct access to the device's internal workings, allowing researchers to dump firmware, manipulate execution, or identify vulnerabilities. Beyond these, deeper investigation may target memory chips and storage chips to understand data persistence and where an implant might reside.
James DeLuccia highlights the builder's defensive strategies. Recognizing the fragility of the supply chain, modern hardware design emphasizes resilient architectures. This includes designing products where critical components, such as CPUs or other chipsets, can be easily swapped out. This capability, born from the supply chain disruptions and security concerns of 2020, allows manufacturers to quickly adapt to banned suppliers or newly discovered vulnerabilities without redesigning the entire product. They also engage in extreme due diligence on chip suppliers and implement robust sourcing policies.
The panel discusses the distinction between fixing vulnerabilities in first-party firmware (developed by the switch manufacturer) versus third-party firmware (e.g., on a separate microcontroller within the device). Each presents unique challenges in terms of access, intellectual property, and vendor coordination. When a finding is reported, the product security team, as described by Aaron Guzman, undertakes a multi-layered triage process. This involves replicating the issue, performing an impact assessment (both technical and business), and determining whether the fix is at the software level or the hardware level. Hardware-level fixes are significantly more complex and costly, often necessitating product respins or waiting for next-generation devices. Software fixes, conversely, might involve updating manufacturing gold images or pushing firmware updates to deployed devices.
For future detection, the panel postulates several advanced approaches. James DeLuccia suggests monitoring physical characteristics of hardware systems, such as vibrations and acoustics (e.g., in HVAC systems), to detect anomalies indicative of misbehavior. Aaron Guzman adds monitoring power consumption, fan speeds, or the activity of a crypto engine in connected environments. The overarching goal is to establish system integrity across all components and their interactions. This could involve cryptographically signed firmware, hardware roots of trust, and continuous runtime verification of component behavior. Marcus Richerson also encourages researchers to explore advanced hardware attack techniques beyond standard JTAG/UART, such as side-channel attacks, fault injection, or physical tampering, as these often reveal deeper, more persistent vulnerabilities.
Aaron Guzman also promotes the OWASP IoT Security Testing Guide, an open-source project designed to make hardware security testing methodologies more accessible. This guide covers various serial communication protocols like SPI (Serial Peripheral Interface) and I2C (Inter-Integrated Circuit), which are fundamental for interacting with and analyzing embedded devices. The project aims to empower more individuals to understand and practice hardware security, fostering a community that can collectively advance the state of hardware detection and defense.
Demo / Proof of Concept
▶ Watch: The difficult reality of hardware remediation in the field (28:50)
As a panel discussion, this talk did not feature a live demonstration or proof of concept of a hardware compromise or its detection. However, the importance of robust Proof of Concepts (POCs) was a recurring theme throughout the conversation, particularly from the perspective of product security teams receiving vulnerability reports.
James DeLuccia emphasized the critical need for researchers to provide clear and replicable POCs when submitting findings. He noted that without a concrete demonstration of the vulnerability – whether through code, a video, or detailed steps – it becomes challenging for product security teams to validate the issue, understand its true impact, and allocate appropriate resources for remediation. A well-crafted POC helps bridge the communication gap between external researchers and internal engineering teams, ensuring that genuine security concerns are not dismissed as mere configuration errors or theoretical possibilities.
Similarly, Aaron Guzman highlighted that when a hardware finding lands in his team's purview, the first step is to understand the researcher's thought process and, crucially, to replicate the weakness. This internal replication often involves the company's own pentesters or red teamers to fully grasp the criticality and scope of the problem before engaging with legal, hardware, and communications teams for a comprehensive response plan. Therefore, while no demo was presented, the discussion underscored that the ability to demonstrate a compromise effectively is a cornerstone of the entire hardware incident response process.
Defensive Implications
▶ Watch: Is hardware detection unsolvable or merely underinvested? (37:00)
The panel discussion illuminated several crucial defensive implications for organizations grappling with hardware security, particularly in the face of sophisticated, supply chain-introduced firmware implants:
- Prioritize Supply Chain Security: The most immediate defensive imperative is to implement extreme due diligence throughout the hardware supply chain. This extends beyond vetting primary vendors to understanding the provenance of individual chips and components. Manufacturers must build products with resilient architectures that allow for component rotation or swapping, mitigating the impact of compromised or restricted suppliers. Proactive sourcing and continuous monitoring of intelligence regarding banned or suspicious hardware are essential.
- Invest in Hardware-Specific Detection: Organizations must move beyond the assumption that software EDR is sufficient for hardware. A dedicated investment in hardware-level detection mechanisms is critical. This includes exploring runtime capabilities, particularly in heavily regulated environments, and leveraging telemetry from physical characteristics. Monitoring subtle anomalies in power consumption, fan speeds, vibrations, acoustics, or crypto engine activity could provide early indicators of compromise that traditional network or host-based tools miss. The goal is to build system integrity checks across all components and interactive elements.
- Strengthen Incident Response for Hardware: Current incident response processes are often ill-equipped for hardware compromises. Organizations need to develop specific, multi-layered triage processes for hardware findings. This involves internal replication of vulnerabilities, comprehensive technical and business impact assessments, and clear communication channels involving engineering, legal, communications, and product teams. The distinction between a software-level fix and a hardware-level fix is paramount, as the latter often entails costly respins or physical device replacements ("rolling trucks").
- Shift Left with Security Education and Testing: Product developers and engineers need to be educated on hardware attack techniques (e.g., decapping, glitching, advanced serial attacks) early in the design phase. Integrating robust hardware security testing, including the methodologies discussed by Marcus Richerson, into the Software Development Lifecycle (SDLC) for hardware is crucial. This proactive approach can prevent many common vulnerabilities from reaching production. Resources like the OWASP IoT Security Testing Guide can aid in this educational effort.
- Foster External Collaboration and Transparency: Manufacturers should actively engage with external security researchers through bug bounty programs and strategic partnerships. Providing clear guidelines for vulnerability reporting and valuing quality Proof of Concepts (POCs) encourages beneficial disclosures. When a compromise occurs, transparency with customers, owning the issue, and demonstrating a clear path to remediation (even if it's a costly recall) are vital for maintaining and rebuilding trust. As James DeLuccia states, "just do the right thing" and "meet them where they are."
- Prepare for Physical Remediation Challenges: Accept the reality that some hardware compromises will necessitate physical intervention. For deployed devices, this means planning for the logistical and financial burden of replacing hardware in the field. Building products with remote update capabilities for firmware and bootloaders can help, but for deeply embedded implants, physical replacement remains the most reliable, albeit painful, solution.
Key Takeaways
- Hardware Detection Lag: Unlike software, robust, widely deployed hardware-level detection and response capabilities are severely lacking, leaving organizations vulnerable to stealthy, persistent firmware implants.
- Supply Chain as a Critical Attack Vector: The supply chain is a prime conduit for introducing firmware implants that can survive factory resets and remain dormant for years, necessitating extreme due diligence on all components and suppliers.
- Remediation is Costly and Physical: Fixing compromised hardware in the field often requires expensive, logistically complex physical replacement ("rolling trucks"), as "hardware is forever."
- Architectural Resilience is Key: Designing hardware with resilient architectures (e.g., swappable components) and robust supply chain governance is essential to adapt to evolving threats and restrictions.
- Collaboration and Transparency Build Trust: Manufacturers must actively engage with security researchers, value Proof of Concepts (POCs), and be transparent with customers about security incidents to maintain and rebuild trust.
- Investment in Future Detection: Future hardware security relies on increased investment in advanced detection techniques, including monitoring physical anomalies (vibrations, acoustics) and enhancing system integrity checks at the deepest levels.
About the Speaker(s)
Aaron Guzman served as the moderator for this panel discussion, guiding the conversation and offering insights from a broad perspective on product security and research. He is actively involved in the open-source community, notably leading the OWASP IoT Security Testing Guide project, which aims to make hardware security testing methodologies more accessible and collaborative, covering various serial communication protocols.
James DeLuccia is the Product Security Chief and BA & AI Cyber Center of Excellence Leader at Honeywell. His expertise lies in the "builder's" perspective, focusing on product security, supply chain governance, and the operational challenges of deploying and securing hardware, particularly in critical environments involving life safety and industrial control systems (like HVAC). He emphasizes resilient architectures and rigorous supply chain management.
Marcus Richerson is associated with Somerset Recon, a firm specializing in hardware security assessments. As an external assessor and security researcher, he brings the "attacker's" and "finder's" perspective to the panel. His experience includes auditing supply chain devices, discovering zero-days in embedded systems, and working extensively in the OT and medical device security sectors. He also contributes to educating the community, teaching medical device hacking and defense training.
Reviews
Dr. Zero (Offensive Security Researcher) — SOLID
Honest conversation about the ugly reality that hardware IR is basically nonexistent compared to software, but the panel never escapes the orbit of 'this is hard' and 'we roll trucks.' Good scene-setting for people who haven't internalized the problem; light on actionable frameworks or novel insight for anyone who has.
Heather Calloway (CISO) — SOLID
Useful reality check on hardware incident response gaps, but stays at the level of problem acknowledgment rather than operational framework. Worth the time if your organization has significant hardware fleet exposure and hasn't thought hard about supply chain firmware risk — otherwise, you've heard most of this before.
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