GoldenFuzz: Generative Golden Reference Hardware Fuzzing

GoldenFuzz: Generative Golden Reference Hardware Fuzzing

Speakers: Lichao Wu

Conference: NDSS Symposium

YouTube: https://www.youtube.com/watch?v=qUcKzD0O4z0

Overview

Traditional hardware fuzzers rely on random mutation strategies that lack semantic understanding of processor behavior. This talk presents GoldenFuzz, a pre-silicon hardware fuzzer that uses a customized GPT-2 language model to generate semantically valid instruction sequences for RISC-V CPU testing. The key innovation is a two-stage fuzzing pipeline: first fuzzing a fast golden reference model (a software ISA simulator) to rapidly refine the language model's fuzzing policy, then applying the refined policy to the actual hardware design under test. Using Direct Preference Optimization (DPO) for coverage-guided policy refinement, GoldenFuzz discovered 7 new vulnerabilities across open-source and proprietary RISC-V cores, including critical logic errors in privileged mode handling on a commercial core, while achieving 28% speedup over state-of-the-art approaches.

Background

▶ Watch: Hardware fuzzing landscape and limitations of random mutation (0:00)

Hardware vulnerability detection is critical because fixing post-fabrication bugs is extremely costly. Pre-silicon evaluation through fuzzing has become popular, with both Intel and Google recently using language models and hardware fuzzing to detect CPU vulnerabilities. However, existing hardware fuzzers have significant limitations. AFL-style random mutation lacks semantic insight into hardware behavior, leading to shallow state exploration. Grammar-based fuzzers like Cascade require significant manual effort and their rigid structures limit input diversity.

The missing piece is automated semantic awareness: the ability to generate complex, multi-instruction test sequences that intelligently explore hardware states, similar to how a human expert would craft targeted tests. GoldenFuzz addresses this by training a language model on instruction sequences and using hardware coverage feedback to refine its generation policy.

Key Findings

▶ Watch: GoldenFuzz pipeline: LM generation, golden model refinement, DUT testing (4:00)

• 7 new vulnerabilities found across open-source and proprietary RISC-V cores, including critical privileged mode handling errors in a commercial core
• 28% speedup over state-of-the-art hardware fuzzers through GPU-accelerated language model inference
• Higher coverage than all baseline approaches across FSM, condition, and line coverage metrics
• Semantic instruction tokenization preserving opcode-operand-immediate structure outperforms standard BPE tokenization for hardware test generation
• Golden reference model pre-refinement significantly improves fuzzing effectiveness by rapidly iterating the language model's policy before expensive hardware simulation
• DPO-based policy refinement effectively teaches the language model to prefer test cases that discover new hardware coverage
• Complex vulnerability triggers: The language model generates multi-stage instruction sequences to trigger vulnerabilities that conventional single/two-instruction fuzzers miss

Technical Deep Dive

▶ Watch: Intra-test and inter-test scoring with DPO policy refinement (8:00)

GoldenFuzz's pipeline consists of four main components:

Language Model Initialization: A GPT-2 model is trained on 10 million instruction sequences across 50,000 epochs. The key innovation in tokenization is preserving instruction semantics by decomposing each instruction into opcode, operand, and immediate data tokens rather than using standard BPE (which breaks semantic boundaries).

Iterative Instruction Block Generation: Rather than generating entire test cases at once, GoldenFuzz produces instruction blocks of 6 instructions at a time, starting from an anchor (existing instruction sequence). Multiple candidate blocks are generated, evaluated against hardware coverage, and the best-performing block is concatenated to the growing test case. This iterative approach simplifies learning and enables diverse path exploration from each anchor point.

Golden Reference Model Pre-Refinement: The golden reference model (a software simulator that strictly adheres to ISA specifications) runs orders of magnitude faster than RTL simulation. GoldenFuzz uses it as a fast feedback loop to refine the language model's fuzzing policy before applying it to the actual hardware design. This dramatically reduces the number of expensive RTL simulation cycles needed.

Coverage-Guided Policy Refinement via DPO: Two scoring mechanisms guide the language model:

• Intra-test scoring: Compares different instruction blocks within the same test case, rewarding discovery of new coverage points
• Inter-test scoring: Compares across test cases with diminishing rewards for repeatedly covered states, encouraging exploration of new hardware states

Direct Preference Optimization tells the language model which instruction blocks are preferred (higher coverage) versus dispreferred, teaching it to generate better test cases over time.

Demo / Proof of Concept

▶ Watch: Results: highest coverage across all metrics, 7 new vulnerabilities (10:00)

GoldenFuzz was evaluated on three different RISC-V cores using FSM, condition, and line coverage metrics. The system discovered 7 new vulnerabilities, including endianness misconfiguration bugs in open-source cores and critical logic errors in privileged mode handling on a proprietary commercial RISC-V core.

The commercial core testing demonstrated a practical deployment model: GoldenFuzz generates test cases using the refined language model, and these test cases are provided offline to collaborators who run them on their proprietary designs. Even without real-time coverage feedback from the commercial core, the pre-refined policy produces effective test cases.

Defensive Implications

▶ Watch: Q&A: why LLMs generate better test cases than random mutation (12:00)

• Automated pre-silicon security evaluation: GoldenFuzz reduces dependence on human hardware security experts by automating semantic test case generation
• Commercial core applicability: The offline test generation model enables security testing of proprietary designs without requiring direct integration access
• LLM-enhanced verification: Demonstrates that language models can internalize hardware fuzzing policies, opening the door to incorporating ISA specifications directly into the model for even more targeted test generation
• Coverage-guided semantic exploration: The DPO-based refinement creates a feedback loop that continuously improves test quality, addressing the shallow exploration limitation of random mutation

Key Takeaways

• GoldenFuzz uses a customized GPT-2 language model with semantic instruction tokenization for hardware fuzzing
• Golden reference model pre-refinement rapidly iterates fuzzing policy before expensive RTL simulation
• Direct Preference Optimization teaches the model to generate coverage-improving instruction sequences
• 7 new vulnerabilities found including critical bugs in a commercial RISC-V core
• The language model generates complex multi-stage triggers that conventional fuzzers miss
• GPU-accelerated inference achieves 28% speedup over state-of-the-art

About the Speaker(s)

Lichao Wu is an assistant professor at the University of Bristol and former postdoc at TU Darmstadt. Remarkably, Wu presented both Fuzzilicon (Best Paper Award) and GoldenFuzz in the same session, demonstrating expertise across both post-silicon and pre-silicon hardware security evaluation. The research collaboration spans hardware security and language model communities.